SPICE is the most commonly used analog circuit simulator
today and is enormously important for the electronics industry. SPICE is a
general purpose analog simulator which contains models for most circuit
elements and can handle complex nonlinear circuits. Aim–SPICE is a type of SPICE
only and in Aim -SPICE CAD tool, circuit is designed by writing netlist. Netlist is
defined as a circuit description in text form.
In Aim-SPICE, the operator has complete control
during a simulation. Before a simulation starts, the circuit variables to be
monitored during the run are selected and Aim-SPICE will graphically display the progress of these variables during the simulation.
The
first line of the net list is the title line. This should contain pertinent
information to the circuit and your file name. The next lines are for circuit
parameters – as many as needed. The next section is for output control
statements. The file is closed with an <.END> statement. Below is the syntax for various elements. Each
parameter name starts with a specific letter followed by a user-defined name (i.e.
R1, Cnew, Vout). The [ ] and the < > are not actually typed, they are for
visual purposes only. Parameter components must be separated by spaces or tabs.
Resistor:
R<name>
[+ node] [- node] [value]
Capacitor:
C<name>
[+ node] [- node] [value] [IC = <initial value>, optional]
Inductor
L<name>
[+ node] [- node] [value] [IC = <initial value>, optional]
Independent
Sources
I<name>
[- node] [+ node] [value] [type] [transient spec]
V<name>
[+ node] [- node] [value] [type] [transient spec]
Dependant
Sources
VCVS:
E<name> [+ node] [- node] [+controlling node] [-controlling node] [gain]
CCCS:
F<name> [+ node] [- node] [Vbranch] [gain]
VCCS:
G<name> [+ node] [- node] [+controlling node] [-controlling node] [gain]
CCVS: H<name> [+ node] [- node]
[Vbranch] [gain]
MOSFET
.MODEL
[model name] NMOS <model parameters>
.MODEL
[model name] PMOS <model parameters>
The simulator can calculate dc operating points, perform
transient analyses, locate poles and zeros for different kinds of transfer
functions, find the small signal frequency response, small signal transfer
functions, small signal sensitivities, and perform Fourier, noise, and
distortion analyses. SPICE allows performing many different operations in
different types of SPICE and in different versions.
AC small signal analysis is initiated by the .AC statement.
AC analysis is used to calculate the frequency response of a circuit over a
range of frequencies. The aim in AC analysis is to determine the AC voltage at
every node in the circuit which is linear because of the small-signal
approximation.
DC Operating Point Analysis is initiated by the .DC
statement. The analysis of nonlinear resistive circuits or equivalently the
analysis of circuits at DC is an important first step in AC and transient
analysis. In both cases nonlinear resistive analysis determines the initial
starting point for further analysis incorporating energy storage elements such
as capacitors and inductors.
DC Temperature Sweep Analysis is initiated by the .TE
statement. In a DC Temperature Sweep Analysis the operating
temperature is swept over a user defined interval. The DC operating point of
the circuit is calculated for every temperature value. The analysis has three
parameters: Start temperature, stop temperature and increment. All parameters
have unit ºC.
DC Transfer Curve Analysis is initiated
by the .TF statement. In a DC Transfer Curve analysis,
one or two source(s) (voltage or current sources) are swept over a user defined
interval. The dc operating point of the circuit is calculated for every value
of the source(s). Source Name is the name of an independent voltage or current
source, Start Value, End Value and Increment Value are the starting, final and
increment values respectively.
Noise Analysis
is initiated by the .N statement. Noise Analysis computes device-generated
noise in a circuit.
1.2.6 DC Operating Point
Analysis
This analysis calculates the DC operating point of a
circuit. It has no parameters.
Pole-Zero Analysis
is initiated by the .PZ statement The Pole-Zero Analysis computes
poles and/or zeros in the small signal ac transfer function. You may instruct
AIM-SPICE locate only poles or only zeros. This feature may allow one of the
sets to be determined if there is a convergence problem with finding both.
In modern VLSI design, importance of accurate MOSFET design
has arisen due to which AIM-SPICE supports 26 MOSFET models. The parameter
LEVEL selects which model to use. The default LEVEL is LEVEL=1.
Before the selection of appropriate MOSFET model type to use
in analysis, there is a need to know the electrical parameters that are
critical to the application. LEVEL 1 model is most often used to simulate large
digital circuits in situations where detailed analog models are not needed.
LEVEL 1 models offer low simulation time and a relatively high level of
accuracy for timing calculations. If there is a need of more precision (such as
for analog data acquisition circuitry), then use of the more detailed models,
such as the LEVEL 6 IDS model or one of the BSIM models can be done. For
precision modelling of integrated circuits, the BSIM models consider the
variation of model parameters as a function of sensitivity of the geometric
parameters. The BSIM models also reference a MOS charge conservation model for
precision modelling of MOS capacitor effects.
AIM-Spice supports 26 MOSFET models.
The parameter LEVEL selects which model to use. The default is LEVEL=1.
Different levels are as follows:
MOSFET Levels in Aim-SPICE
|
Sr. No.
|
Models
|
Levels
|
|
1
|
Berkeley SPICE Models
|
1,2,3,6
|
|
2
|
Berkeley SPICE BSIM1 Model
|
4
|
|
3
|
Berkeley SPICE BSIM2 Model
|
5
|
|
4
|
MOSFET Model MOSA1
|
7
|
|
5
|
MOSFET Model NPMOSA1
|
8
|
|
6
|
MOSFET Model NPMOSA2
|
9
|
|
7
|
MOSFET Model NPMOSA3
|
10
|
|
8
|
Amorphous-Si TFT Model ASIA1
|
11
|
|
9
|
Poly-Si TFT Model PSIA1
|
12
|
|
10
|
Berkeley SPICE BSIM3v2 Model
|
13
|
|
11
|
Berkeley SPICE BSIM3v3.1 Model
|
14
|
|
12
|
Amorphous-Si TFT Model ASIA2
|
15
|
|
13
|
Poly-Si TFT Model PSIA2
|
16
|
|
14
|
Berkeley SPICE BSIM3 v3.2.4 and
v3.3.0 Models
|
17, 18
|
|
15
|
Berkeley SPICE BSIM3SOI Model
|
19
|
|
16
|
Berkeley SPICE BSIM4
Models
|
20, 21, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32
|
|
17
|
EKV MOS version v2.6 Model
|
23
|
|
18
|
Berkeley SPICE BSIMSOI Model
Version 4.0
|
35
|
