CAD tools for mixed signal design

At present, computer-aided design (CAD) simulation programs are widely used as tools for testing and evaluating the performance of various designs within the different research fields of engineering. Advancements in analog design tools have played a critical role in increasing the efficiency of analog circuit design and verification. Because of the effectiveness and capabilities of these tools, different simulation programs have been designed.

SPICE was the first CAD tool developed for analog design at University of California, Berkeley in 1970. Since then, SPICE and SPICE models started to become adapted by analog designers, to their now long time stature as indispensable design tools. SPICE complemented the manual calculations, providing designers with an accurate way to verify their designs, and enabling designers to rapidly understand the effects of process and environmental conditions. SPICE has advanced considerably over the past 30 years. The basic AC, DC, transient and steady-state simulation techniques are much faster and more accurate, and the addition of new analysis techniques has enabled designers to create circuits that operate at high speeds, are tolerant to noise, and have high yield.

Many other variants of SPICE are present. Those are:

1.      PSPICE

2.      Aim-SPICE

3.      HSPICE

4.      NGSPICE

5.      WinSPICE etc.

Different CAD Tools for Analog and Mixed Signal Design

Due to the increasing levels of integration available in silicon technology and the growing requirement for digital systems to communicate with the continuous-valued external world, there is a growing need for CAD tools that increase the design productivity and improve the quality of analog integrated circuits. Therefore there are many CAD tools developed for analog and mixed signal design.

There are many tools available for analog and mixed signal design. Those are:

1.      MATLAB

2.      LabVIEW

3.      SPICE

4.      VHDL-AMS

5.      PSIM

6.      ELDO

7.      Synopsys

8.      T-CAD

For mixed signal design, design of both analog and digital sections is required. Therefore, a mixed signal design CAD tool is preferred.

Advantages of MATLAB over other mixed signal design tools:

1. MATLAB is a high-level language whose basic data type is a matrix that does not require dimensioning. 

2. There is no compilation and linking as is done in high-level languages, such as C or FORTRAN. 

3. Computer solutions in MATLAB are much quicker than those of a high-level language such as C or FORTRAN. 

4. MATLAB is better for computation than LabVIEW. 

5. Simulations execute faster in MATLAB (nearly 3 times) as compared to LabVIEW. 

6. The maximum error in the delay, computed using MATLAB, is less than 8% compared to HSPICE simulation results. 

7. MATLAB has a rich set of plotting capabilities.

8. It is also a programming environment; therefore the user can extend the functional capabilities of MATLAB by writing new modules.

9. MATLAB also has a large collection of toolboxes in a variety of domains.

10. MATLAB is a tool which can provide analog and digital design on a common platform and the verification of the circuit performance can be estimated. 

Therefore, MATLAB has become the preferred language of computing for the researchers.    

AIM-SPICE

SPICE is the most commonly used analog circuit simulator today and is enormously important for the electronics industry. SPICE is a general purpose analog simulator which contains models for most circuit elements and can handle complex nonlinear circuits. Aim–SPICE is a type of SPICE only and in Aim -SPICE CAD tool, circuit is designed by writing netlist. Netlist is defined as a circuit description in text form.

In Aim-SPICE, the operator has complete control during a simulation. Before a simulation starts, the circuit variables to be monitored during the run are selected and Aim-SPICE will graphically display  the progress of these variables during the simulation.

1.1.1    Netlist Format

The first line of the net list is the title line. This should contain pertinent information to the circuit and your file name. The next lines are for circuit parameters – as many as needed. The next section is for output control statements. The file is closed with an <.END> statement. Below is the syntax for various elements. Each parameter name starts with a specific letter followed by a user-defined name (i.e. R1, Cnew, Vout). The [ ] and the < > are not actually typed, they are for visual purposes only. Parameter components must be separated by spaces or tabs.

1.1.2    Parameter Syntax

Resistor:

R<name> [+ node] [- node] [value]

Capacitor:

C<name> [+ node] [- node] [value] [IC = <initial value>, optional]

Inductor

L<name> [+ node] [- node] [value] [IC = <initial value>, optional]

Independent Sources

I<name> [- node] [+ node] [value] [type] [transient spec]

V<name> [+ node] [- node] [value] [type] [transient spec]

Dependant Sources

VCVS: E<name> [+ node] [- node] [+controlling node] [-controlling node] [gain]

CCCS: F<name> [+ node] [- node] [Vbranch] [gain]

VCCS: G<name> [+ node] [- node] [+controlling node] [-controlling node] [gain]

CCVS: H<name> [+ node] [- node] [Vbranch] [gain]

MOSFET

.MODEL [model name] NMOS <model parameters>

.MODEL [model name] PMOS <model parameters>

1.2      Output Analysis in Aim-SPICE

The simulator can calculate dc operating points, perform transient analyses, locate poles and zeros for different kinds of transfer functions, find the small signal frequency response, small signal transfer functions, small signal sensitivities, and perform Fourier, noise, and distortion analyses. SPICE allows performing many different operations in different types of SPICE and in different versions.

1.2.1    AC Analysis

AC small signal analysis is initiated by the .AC statement. AC analysis is used to calculate the frequency response of a circuit over a range of frequencies. The aim in AC analysis is to determine the AC voltage at every node in the circuit which is linear because of the small-signal approximation.

1.2.2    DC Analysis

DC Operating Point Analysis is initiated by the .DC statement. The analysis of nonlinear resistive circuits or equivalently the analysis of circuits at DC is an important first step in AC and transient analysis. In both cases nonlinear resistive analysis determines the initial starting point for further analysis incorporating energy storage elements such as capacitors and inductors.

1.2.3    DC Temperature Sweep Analysis

DC Temperature Sweep Analysis is initiated by the .TE statement. In a DC Temperature Sweep Analysis the operating temperature is swept over a user defined interval. The DC operating point of the circuit is calculated for every temperature value. The analysis has three parameters: Start temperature, stop temperature and increment. All parameters have unit ºC.

1.2.4    DC Transfer Curve Analysis

DC Transfer Curve Analysis is initiated by the .TF statement. In a DC Transfer Curve analysis, one or two source(s) (voltage or current sources) are swept over a user defined interval. The dc operating point of the circuit is calculated for every value of the source(s). Source Name is the name of an independent voltage or current source, Start Value, End Value and Increment Value are the starting, final and increment values respectively.

1.2.5    Noise Analysis

Noise Analysis is initiated by the .N statement. Noise Analysis computes device-generated noise in a circuit.

1.2.6    DC Operating Point Analysis

This analysis calculates the DC operating point of a circuit. It has no parameters.

1.2.7    Pole-Zero Analysis

Pole-Zero Analysis is initiated by the .PZ statement The Pole-Zero Analysis computes poles and/or zeros in the small signal ac transfer function. You may instruct AIM-SPICE locate only poles or only zeros. This feature may allow one of the sets to be determined if there is a convergence problem with finding both.

1.3      Importance of MOSFET Levels

In modern VLSI design, importance of accurate MOSFET design has arisen due to which AIM-SPICE supports 26 MOSFET models. The parameter LEVEL selects which model to use. The default LEVEL is LEVEL=1.

Before the selection of appropriate MOSFET model type to use in analysis, there is a need to know the electrical parameters that are critical to the application. LEVEL 1 model is most often used to simulate large digital circuits in situations where detailed analog models are not needed. LEVEL 1 models offer low simulation time and a relatively high level of accuracy for timing calculations. If there is a need of more precision (such as for analog data acquisition circuitry), then use of the more detailed models, such as the LEVEL 6 IDS model or one of the BSIM models can be done. For precision modelling of integrated circuits, the BSIM models consider the variation of model parameters as a function of sensitivity of the geometric parameters. The BSIM models also reference a MOS charge conservation model for precision modelling of MOS capacitor effects.

1.3.1    Available MOSFET levels in Aim-SPICE

AIM-Spice supports 26 MOSFET models. The parameter LEVEL selects which model to use. The default is LEVEL=1.

Different levels are as follows:

 MOSFET Levels in Aim-SPICE

Sr. No.	Models	Levels
1	Berkeley SPICE Models	1,2,3,6
2	Berkeley SPICE BSIM1 Model	4
3	Berkeley SPICE BSIM2 Model	5
4	MOSFET Model MOSA1	7
5	MOSFET Model NPMOSA1	8
6	MOSFET Model NPMOSA2	9
7	MOSFET Model NPMOSA3	10
8	Amorphous-Si TFT Model ASIA1	11
9	Poly-Si TFT Model PSIA1	12
10	Berkeley SPICE BSIM3v2 Model	13
11	Berkeley SPICE BSIM3v3.1 Model	14
12	Amorphous-Si TFT Model ASIA2	15
13	Poly-Si TFT Model PSIA2	16
14	Berkeley SPICE BSIM3 v3.2.4 and v3.3.0 Models	17, 18
15	Berkeley SPICE BSIM3SOI Model	19
16	Berkeley SPICE BSIM4 Models	20, 21, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32
17	EKV MOS version v2.6 Model	23
18	Berkeley SPICE BSIMSOI Model Version 4.0	35

Importing SPICE Models in MATLAB

Importance of importing Aim-SPICE models in MATLAB :

MATLAB operates only on Level 1 and Level 3 models for MOSFET. As number of Levels increases then the accuracy of design improves. Aim-SPICE defines 26 MOSFET Levels which can be imported into MATLAB by using a methodology given below.

The flowchart for importing SPICE Models in MATLAB is shown below.

Methodology

1.      Write Netlist in Aim-SPICE:

First step in any design is designing the circuit. In Aim-SPICE designed circuit is defined by writing netlist.

2.      Importing SPICE netlist in MATLAB:

For importing the SPICE netlist in MATLAB first step is to open MATLAB and link MATLAB and Aim-SPICE by setting path. Setting path means to let MATLAB know the directory of Aim-SPICE.

After this step, importing is performed by using function ‘netlist2sl’. This function imports netlist of circuit from Aim-SPICE to MATLAB Simulink.

1.      Generation of Model as a Black-box:

After using the function ‘netlist2sl (filename, library)’ MATLAB generates a black-box model of filename and stores it in a library which is defined in the given function.

For e.g. if it is written “netlist2sl (‘mydiode’, ‘genlib’)” then a black-box model of name ‘mydiode’ will be generated and it will be stored in library ‘genlib’.

1.      Check for Errors if Output is not as Expected:

If circuit is not giving output as required then corrections has to be done either in netlist by going to Aim-SPICE or in model designed in Simulink.

2.      Assign Input and Output to New Model:

In this step, the generated model is used to design a complete circuit in Simulink by connecting input and output blocks.

For e.g. ‘mydiode’ is used to make a circuit of diode as a switch as shown in below figure.

1.      Run the Model and See the Output:

When the design is error free then it can be run and output can be seen on the scope.

For seeing the netlist in MATLAB command window, function ‘type (filename)’ function is used.

For e.g. if netlist of ‘mydiode’ is to be seen then function ‘type (‘mydiode.cir’) is used.

Resistive-Load Inverter

The analysis of this resistive load inverter circuit is the basis for an inverter design which will help in further designs.

In this post, we will examine the depletion load NMOS inverter. The basic structure of the resistive-load inverter circuit is shown in below figure.

 In this circuit, an enhancement-type nMOS transistor acts as the driver device. RL acts as the load. VDD is the power supply voltage of the circuit.

When the input of the driver transistor is less than the threshold voltage Vth i.e. Vin < Vth, the driver transistor is in the cut – off region and acts as a closed switch thus, does not conduct any current. So, the voltage drop across the load resistor is ZERO and output voltage is equal to the supply voltage VDD.

Now, when the input voltage is increased then the driver transistor will start conducting and it will provide some non-zero drain current and the driver transistor is in saturation region.

As input is increased further, the drain current of the driver transistor also increases so, the output voltage starts decreasing. That means, if input voltage is greater than Vout+Vth, the driver transistor enters in the linear region and the output voltage continues to decrease..

The operating modes for different input output voltages are given in below table. 

MOS Inverters: Static Characteristics

The inverter is the most fundamental logic gate and it can be directly applied to more complex logic circuits, such as NAND and NOR gates. Thus, the inverter designing is also crucial for digital circuit design. 

In above figure, an inverter is shown which inverts the input voltage A and gives the inverted output as B. In MOS inverter circuit design, using positive logic convention logic 1 is represented as high voltage or VDD and logic 0 is represented as low voltage. The DC voltage transfer characteristic (VTC) is also shown in above figure. The voltage Vth is called the inverter threshold voltage. 

For any input voltage between 0 and Vth = VDD/2, the output voltage is equal to VDD i.e. logic '1'. The output switches from VDD to 0 when the input is equal to Vth. 

For any input voltage between Vth and VDD, the output voltage assumes a value of 0 i.e. logic '0'. Thus, an input voltage 0 < Vin < Vth is interpreted by this ideal inverter as a logic "0," while an input voltage Vth <Vin < VDD is interpreted as a logic " 1." 

The general circuit structure of an NMOS inverter is shown in the above figure.

For very low input voltage levels which are below the threshold voltage Vth, the driver nMOS transistor is in cut-off, hence, it does not conduct any current. Therefore, the voltage drop across the load device is very small and the output voltage (Vout) is high (VOH).

When the input voltage Vin increases and crosses the Vth, the driver nMOS transistor starts conducting and certain drain current flows, and the output voltage starts decreasing. This drop in the output voltage level does not occur abruptly but rather gradually and with a finite slope. 

VTC of the nMOS inverter, shown below, indicates the operating mode of driver transistor and voltage points.

VOH: Maximum output voltage when the output level is logic " 1" 

VOL Minimum output voltage when the output level is logic "0" 

VIL: Maximum input voltage which can be interpreted as logic "0" 

VIH: Minimum input voltage which can be interpreted as logic " 1"

For any inverter circuit, estimation of the five critical voltage points i.e. VOL, VOH, VIL, VIH and Vth for different inverter designs is an important task.

Fabrication of MOSFET

MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is widely used in digital logic circuits and as memory devices, because these application requires very high packing density for the memory. Manufacturing is very important task and is directly related to performance of resulting chip. The circuit designer must have the knowledge of different manufacturing process so as to optimize the design with respect to different manufacturing processes in order to improve the design. 

Silicon is preferred for MOS fabrication

Because silicon is very easy to oxidize. We just need to increase the temperature and keep the silicon in an oxygen ambient and oxidation will occur. Also, silicon has a great affinity for oxygen, so it will form silicon dioxide, SiO2 layer easily and this silicon dioxide has an excellent insulating, masking and dielectric  properties.  

Now, in the following steps we will discuss the different fabrication steps of MOSFET on silicon substrate. 

Steps:

1. Thermal Oxidation

We have considered n type silicon substrate. The first step in the fabrication of MOSFET is the growth of a thick field oxide on silicon substrate as shown in figure a and b.  

2. Photolithography

After the thick field oxide is grown, next step is photolithography. Photolithography is defined as the selective removal of oxide. To dope the substrate selectively, some regions will require oxide and some other region will not require. For that reason firstly the entire silicon dioxide surface is covered with a layer of photoresist.

The areas where we want to dope, we will expose those areas to ultraviolet (UV) light and other regions are protected with mask. The exposed photoresist area becomes soluble and this area can be etched by using some etching solvents in the next process and then it can be doped.

Positive photoresist material- The type of photoresist which is initially insoluble and becomes soluble after exposure to UV light is called positive photoresist.

Negative photoresist material- The type of photoresist which is initially soluble and becomes insoluble (hardened) after exposure to UV light, called negative photoresist.

After the region is etched then the entire surface is covered with gate oxide which is thin and high-quality oxide layer. This thin oxide layer will eventually form the gate oxide. 

On top of this thin oxide layer, next layer is formed which is a polysilicon layer. Polysilicon is used both as gate electrode material for MOS transistors and also as an interconnect medium in silicon integrated circuits.

After the layer is deposited, the polysilicon layer is selectively etched to form the interconnects and the MOS transistor gates. In next step, for the doping purpose, the thin gate oxide area which is not covered by polysilicon is also etched away. This exposes the bare silicon surface through which the silicon substrate is doped to form source and drain junctions. 

3. Diffusion or Ion implantation

The process of doping is called as diffusion or ion implantation. 

The entire silicon surface is then doped with a high concentration of impurities, either through diffusion or ion implantation (in this case with donor atoms to produce n-type doping). Figure 2.4(h) shows that the doping penetrates the exposed areas on the silicon surface, ultimately creating two ntype regions (source and drain junctions) in the p-type substrate. The impurity doping also penetrates the polysilicon on the surface, reducing its resistivity

in order to dope the substrate selectively, you have to keep oxide in some regions and remove the oxide from some other regions. Wherever the oxide is present, it will act as a mask against doping, so those portions will not get doped. The other regions from where you have removed the oxide, it will get doped when subjected to doping. Ok? Now, this selective removal of oxide is done by a technique called photolithography