The analysis of this resistive load inverter circuit is the basis for an inverter design which will help in further designs.
In this post, we will examine the depletion load NMOS inverter. The basic structure of the resistive-load inverter circuit is shown in below figure.
In this circuit, an enhancement-type nMOS
transistor acts as the driver device. RL acts as the load. VDD is the power supply voltage of the circuit.
When the input of the driver transistor is less than the threshold voltage Vth i.e. Vin < Vth, the driver transistor is in the cut – off region and acts as a closed switch thus, does not conduct any current. So, the voltage drop across the load resistor is ZERO and output voltage is equal to the supply voltage VDD.
Now, when the input voltage is increased then the driver transistor will start conducting and it will provide some non-zero drain current and the driver transistor is in saturation region.
As input is increased further, the drain current of the driver transistor also increases so, the output voltage starts decreasing. That means, if input voltage is greater than Vout+Vth, the driver transistor enters in the linear region and the output voltage continues to decrease..
The operating modes for different input output voltages are given in below table.
As input is increased further, the drain current of the driver transistor also increases so, the output voltage starts decreasing. That means, if input voltage is greater than Vout+Vth, the driver transistor enters in the linear region and the output voltage continues to decrease..
The operating modes for different input output voltages are given in below table.
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